I've searched for a long time, but didn't really find a satisfying answer. I'm currently trying to figure out the lower limit of my vSoC on my AMD Ryzen 5 7500F, but I can go to ridiculously low numbers before encountering any kind of instability.
My current voltages are: CO -30, CPU_VDDIO 1.2V, VDDP 0.95V, VDDG 1V, vSoC 1.1V. I use 6000MT/s DDR5 Hynix M Die.
When setting the the vSoC to 1.05V, my keyboard wasn't recognized on boot and I had to unplug and re-plug to type in my password. So this is way too low.
On 1.1V I ran many stress tests for hours (prime95, OCCT CPU+RAM/Memory/Linpack, y-cruncher, HCIMemtest) and encountered no errors. However, I had the input field of HCIMemtest-GUI disappear on 4 out of 8 instances.
So, to get to my question: What is required to properly stress test the SoC voltage? According to Skatterbencher, "The VDDCR_SOC voltage rail provides the external power for multiple internal voltage regulators on SOC for the various IP blocks, including but not limited to the memory controller, SMU, PSP, graphics, etc". So only testing the memory controller (and the cores), like I did, wouldn't trigger any instability, right? How do I stress all of those? And what IP blocks are also derived by vSoC?